UNKNOWN CONNECTOR at the computer.
| Pin | Name | Description |
| 1 | | |
| 2 | /WR | Write |
| 3 | /RD | Read |
| 4 | /WE | Write Enable |
| 5 | A0 | Address 0 |
| 6 | A1 | Address 1 |
| 7 | A2 | Address 2 |
| 8 | A3 | Address 3 |
| 9 | A4 | Address 4 |
| 10 | A5 | Address 5 |
| 11 | A6 | Address 6 |
| 12 | /INT | Interrupt |
| 13 | +5V | +5 VDC (One of the +5V is decoupled through a RC-low-pass.) |
| 14 | +5V | +5 VDC (One of the +5V is decoupled through a RC-low-pass.) |
| 15 | U | Color-difference signals. |
| 16 | V | Color-difference signals. |
| 17 | /Y | Inverted Video+Sync. |
| 18 | D0 | Data 0 |
| 19 | T0 | Keyboard Data 0 |
| 20 | T1 | Keyboard Data 1 |
| 21 | D1 | Data 1 |
| 22 | D2 | Data 2 |
| 23 | T2 | Keyboard Data 2 |
| 24 | T3 | Keyboard Data 3 |
| 25 | D3 | Data 3 |
| 26 | T4 | Keyboard Data 4 |
| 27 | D4 | Data 4 |
| 28 | SOUND | Analog-I/O-line for beep, save and load. |
| 29 | D5 | Data 5 |
| 30 | D6 | Data 6 |
| 31 | D7 | Data 7 |
| 32 | CLOCK | The clock-source to the CPU including the inhibited T-states. |
| 33 | /IO-ULA | (A0(CPU) OR /IORQ) for the I/O-port FEh |
| 34 | /ROM CS | ROM ChipSelect |
| 35 | /RAS | Row Address Strobe |
| 36 | A14 | Address 14 |
| 37 | A15 | Address 15 |
| 38 | /MREQ | ??? |
| 39 | Q | The 14 MHz crystal. Other side grounded through capacitor. |
| 40 | | |