Piedinature - Pinouts
Miniature Card

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Developed by Intel.
Miniature Card is a memory-only expansion card.

[UNKNOWN] (At the device)
[UNKNOWN] (At the card)

UNKNOWN CONNECTOR at the device.
UNKNOWN CONNECTOR at the card.

Pin Name Description Dir
1 A18 Address Bus IN
2 A16 Address Bus IN
3 A14 Address Bus IN
4 Vccr Voltage Refresh IN
5 CEH# Card Enable High Byte IN
6 A11 Address Bus IN
7 A9 Address Bus IN
8 A8 Address Bus IN
9 A6 Address Bus IN
10 A5 Address Bus IN
11 A3 Address Bus IN
12 A2 Address Bus IN
13 A0 Address Bus IN
14 RAS# Row Address Strobe IN
15 A24 Address Bus IN
16 A23 Address Bus IN
17 A22 Address Bus IN
18 OE# Output Enable IN
19 D15 Data Bus IN/OUT
20 D13 Data Bus IN/OUT
21 D12 Data Bus IN/OUT
22 D10 Data Bus IN/OUT
23 D9 Data Bus IN/OUT
24 D0 Data Bus IN/OUT
25 D2 Data Bus IN/OUT
26 D4 Data Bus IN/OUT
27 RFU Reserved for future use  
28 D7 Data Bus IN/OUT
29 SDA Serial Data and Address IN/OUT
30 SCL Serial Clock IN
31 A19 Address Bus IN
32 A17 Address Bus IN
33 A15 Address Bus IN
34 A13 Address Bus IN
35 A12 Address Bus IN
36 RESET# Reset IN
37 A10 Address Bus IN
38 VS1# Voltage Sense 1 OUT
39 A7 Address Bus IN
40 BS8# Bus Size 8 IN
41 A4 Address Bus IN
42 CEL# Card Enable Low Byte IN
43 A1 Address Bus IN
44 CASL# Column Address Strobe Low Byte IN
45 CASH# Column Address Strobe High Byte IN
46 CD# Card Detect OUT
47 A21 Address Bus IN
48 BUSY# Ready/Busy OUT
49 WE# Write Enable IN
50 D14 Data Bus IN/OUT
51 RFU Reserved for future use  
52 D11 Data Bus IN/OUT
53 VS2# Voltage Sense 2 OUT
54 D8 Data Bus IN/OUT
55 D1 Data Bus IN/OUT
56 D3 Data Bus IN/OUT
57 D5 Data Bus IN/OUT
58 D6 Data Bus IN/OUT
59 RFU Reserved for future use  
60 A20 Address Bus IN

The following three is separate:

Name Description Dir
GND Ground  
VCC Power  
CINS# Card Insertion OUT
Note: Direction is card relative device.

This section is currently based solely on the Miniature Card specification v1.1.

Signal Descriptions:

A0-A24

Address A0 to A24 are the address bus lines that can address up to 32 Mwords (64 MBytes). The Miniature Card specification does not require the Miniature Card to decode the upper address lines. A 2 Mbyte Miniature Card that does not decode the upper address lines would repeat its address space every 2 Mbytes. Address 0h would access the same physical location as 200000h, 400000h, 600000h, etc.

D0-D15

Data lines D0 through D15 constitute the data bus. The data bus is composed of two bytes, the low byte D[7:0] and the high byte D[15:8].

OE#

OE# indicates that the current bus cycle is a read cycle.

WE#

WE# indicates that the current bus cycle is a write cycle.

VS1#

Voltage Sense 1 signal. The card grounds this signal to indicate it can operate at 3.3 Volts. This signal must either be connected to card GND or left open.

VS2#

Voltage Sense 2 signal. The card grounds this signal to indicate it can operate at x.x Volts (the value to be determined at a later date). This signal must either be connected to card GND or left open.

CEL#

CEL# enables the low byte of the data bus (D[7:0]) on the card. This signal is not used in DRAM cards.

CEH#

CEH# enables the high byte of the data bus (D[15:8]) on the card. This signal is not used in DRAM cards.

RAS#

RAS# strobes in the row address for DRAM cards.

CASL#

CASL# strobes in the low byte column address for DRAM cards.

CASH#

CASH# strobes in the high byte column address for DRAM cards.

RESET#

RESET# controls card initialization. When RESET# transitions from a low state to a high state, the Miniature Card must reset to a predetermined state.

BUSY#

BUSY# is a signal generated by the card to indicate the status of operations within the Miniature Card. When BUSY# is high, the Miniature Card is ready to accept the next command from the host. When BUSY# is low, the Miniature Card is busy and unable to accept some data operations from the host. For example, in Flash Miniature Cards the BUSY# signal is tied to the components RY/BY# signal. However, ROM Miniature Cards would always drive BUSY# high since the host will always be able to read from a ROM Miniature Card.

Vccr

Vccr provides a low current (refresh) voltage supply. Vccr is a feature used by DRAM Miniature Cards to "self-refresh" during "sleep" mode.

SDA

I2C: Serial Data/Address.

SCL

I2C: Serial Clock are used to read the attribute information structure (AIS) from the serial EEPROM in a DRAM card.

CD#

CD# is a grounded interface signal. After a Miniature Card has been inserted, CD# will be forced low. The card detect signal is located in the center of the second row of interface signals, and should be one of the last interface signals to connect to the host. Do not confuse CD# with CINS#. CINS# is an early card detect that is one of the first signals to connect to the host.

BS8#

BS8# is a signal driven by the host to indicate if the data bus is x8 or x16. An 8-bit host must drive BS8# low and tie the high byte data bus D[15:8] to the low byte data bus D[7:0]. A 16-bit host must drive this signal high.

GND

Ground

Vcc

Vcc is used to supply power to the card.

CINS#

CINS# is a grounded signal on the front of the Miniature Card that can be used for early detection of a card insertion. CINS# makes contact on the host when the front of the card is inserted into the socket, before the interface signals connect.



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